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[020] Industry briefing - EUV The Focal Point
ASML’s Q4 2025 results turned the A.I. chip boom into a lithography backlog that looks more like a capacity reservation system than a sales pipeline. This week we connect that record order intake to the real factory constraint: usable exposures per day in Extreme Ultraviolet. Then we zoom out to the “memory wall” and why high-bandwidth memory demand feeds directly into E. U. V. tool time.
Key takeaways:
- ASML ended 2025 with a €38.8B backlog, and Q4 net bookings of €13.2B included €7.4B of E. U. V. systems.
- ASML guided 2026 net sales to €34–39B with gross margin of 51–53%, signaling execution and fab readiness as key limiters.
- A new ASML share buyback program of up to €12B through 2028 underscores confidence in multi-year demand visibility.
- The “memory wall” is shifting system performance bottlenecks from compute to bandwidth and data movement, accelerating demand for HBM and server DRAM.
- Rising HBM demand tends to increase E. U. V. intensity in advanced DRAM as pitches shrink and multi-patterning becomes less tolerable.
- High-N. A. E. U. V. is moving from prototype to factory accountability, with ASML recognizing revenue for two High-N. A. systems in Q4.
- In the A.I. era, the strategic variable is not just tool count but throughput, defectivity, and cycle time at the E. U. V. bottleneck.
- Missing/unclear: Several major E. U. V. buyers have provided limited new, on-the-record near-term installation and ramp timelines beyond recent earnings disclosures.
Glossary:
Backlog — Accumulated value of accepted system orders not yet recognized as revenue.
Net bookings — Order intake for systems (and related adjustments) accepted during a period.
Extreme Ultraviolet (E. U. V.) lithography — 13.5 nm wavelength lithography used for leading-edge patterning.
High numerical aperture (High-N. A.) — Higher-NA E. U. V. optics aimed at improved resolution and reduced multi-patterning.
Throughput — Productive wafers per hour/day; the practical capacity metric at bottleneck tools.
Stochastic variability — Random process noise that can cause line-edge roughness, defects, or yield loss at small features.
Multi-patterning — Using multiple exposures/etch steps to achieve smaller pitch than a single lithography step can print.
HBM — High-bandwidth memory, typically stacked DRAM used with accelerators to increase memory bandwidth.
DDR5 — A mainstream server memory generation whose demand rises with inference-scale deployments.
Installed base management — Service, options, and support revenue tied to the fleet of deployed tools.
This podcast was created with the help of AI. AI can make mistakes. Please verify the information if you intend to use it as a basis for your decision-making.
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By EUV The Focal Point - TeamASML’s Q4 2025 results turned the A.I. chip boom into a lithography backlog that looks more like a capacity reservation system than a sales pipeline. This week we connect that record order intake to the real factory constraint: usable exposures per day in Extreme Ultraviolet. Then we zoom out to the “memory wall” and why high-bandwidth memory demand feeds directly into E. U. V. tool time.
Key takeaways:
- ASML ended 2025 with a €38.8B backlog, and Q4 net bookings of €13.2B included €7.4B of E. U. V. systems.
- ASML guided 2026 net sales to €34–39B with gross margin of 51–53%, signaling execution and fab readiness as key limiters.
- A new ASML share buyback program of up to €12B through 2028 underscores confidence in multi-year demand visibility.
- The “memory wall” is shifting system performance bottlenecks from compute to bandwidth and data movement, accelerating demand for HBM and server DRAM.
- Rising HBM demand tends to increase E. U. V. intensity in advanced DRAM as pitches shrink and multi-patterning becomes less tolerable.
- High-N. A. E. U. V. is moving from prototype to factory accountability, with ASML recognizing revenue for two High-N. A. systems in Q4.
- In the A.I. era, the strategic variable is not just tool count but throughput, defectivity, and cycle time at the E. U. V. bottleneck.
- Missing/unclear: Several major E. U. V. buyers have provided limited new, on-the-record near-term installation and ramp timelines beyond recent earnings disclosures.
Glossary:
Backlog — Accumulated value of accepted system orders not yet recognized as revenue.
Net bookings — Order intake for systems (and related adjustments) accepted during a period.
Extreme Ultraviolet (E. U. V.) lithography — 13.5 nm wavelength lithography used for leading-edge patterning.
High numerical aperture (High-N. A.) — Higher-NA E. U. V. optics aimed at improved resolution and reduced multi-patterning.
Throughput — Productive wafers per hour/day; the practical capacity metric at bottleneck tools.
Stochastic variability — Random process noise that can cause line-edge roughness, defects, or yield loss at small features.
Multi-patterning — Using multiple exposures/etch steps to achieve smaller pitch than a single lithography step can print.
HBM — High-bandwidth memory, typically stacked DRAM used with accelerators to increase memory bandwidth.
DDR5 — A mainstream server memory generation whose demand rises with inference-scale deployments.
Installed base management — Service, options, and support revenue tied to the fleet of deployed tools.
This podcast was created with the help of AI. AI can make mistakes. Please verify the information if you intend to use it as a basis for your decision-making.