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Logic chips think, graphics chips see, memory chips remember—but under the hood, they’re all transistors optimized for different constraints.

In this episode we compare CPUs/SoCs, GPUs, and modern memory (SRAM, DRAM, NAND) through the lens of the EUV era: what the finished chips look like, what they’re used for, and why scaling shifts bottlenecks toward data movement and packaging.

Key takeaways

- “Logic” chips are dominated by wiring, power, and variability management—not just transistor switching speed.

- CPUs optimize for latency and control; GPUs optimize for throughput and sustained data-parallel work.

- SRAM is fast and refresh-free but expensive per bit, so it lives on logic dies as caches and registers.

- DRAM is far denser but needs refresh, so it becomes main memory and the stacked memory used in HBM.

- NAND flash is non-volatile storage that trades write/erase complexity and wear for ultra-low cost per bit.

- EUV shows up in finished logic chips as higher density, enabling more compute, more cache, and more specialized accelerators.

- EUV shows up in advanced DRAM as continued scaling, more bits per wafer, and improved power efficiency.

- As compute gets denser, performance increasingly depends on moving data efficiently—making memory technology and packaging central.

- HBM uses a wide, short-reach interface near the logic die to deliver extreme bandwidth with better energy per bit than long, high-speed board links.

Glossary

- Logic chip: A chip whose primary job is computation and control (CPUs, SoCs, accelerators).

- GPU (graphics processing unit): A throughput-oriented logic chip built from many parallel compute blocks.

- SRAM (static random access memory): Fast volatile memory built from bistable circuits; used mainly for on-chip cache.

- DRAM (dynamic random access memory): Dense volatile memory that stores bits as charge and requires refresh.

- NAND flash: Non-volatile memory used for storage; retains data without power by trapping charge.

- GDDR: Graphics DRAM family commonly used as external memory on GPU add-in boards.

- HBM (high bandwidth memory): 3D-stacked DRAM placed close to a logic die to provide very high bandwidth.

- Chiplet: A design style that splits a system into multiple dies connected by high-speed package links.

- Advanced packaging: Packaging technologies that integrate multiple dies closely (e.g., interposers and dense die-to-die links).