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High-NA EUV moved closer to factory reality this week, but the bigger story is that AI demand is now reshaping the whole manufacturing stack around it. ASML supplied new readiness numbers, NVIDIA showed how AI is moving into lithography and verification flows, and Micron, SK hynix and Applied Materials made fresh moves around HBM, wafers and capacity. This episode explains why the competition is shifting from isolated tool milestones to coordinated manufacturability.

Key takeaways

- ASML said its High-NA EUV tools have processed about 500,000 wafers, are running at roughly 80% uptime, and target 90% uptime by the end of 2026.

- NVIDIA said Samsung, SK hynix and TSMC are using GPU-accelerated software for semiconductor design and manufacturing; Samsung and SK hynix were specifically named in computational lithography and physical verification.

- Micron said its 36GB 12H HBM4 is in high-volume production for NVIDIA Vera Rubin, with more than 2.8 TB/s bandwidth and about 20% better power efficiency.

- Micron completed the acquisition of PSMC’s Tongluo P5 site in Taiwan and plans to retrofit the existing cleanroom now, with a second similar-sized cleanroom planned by the end of fiscal 2026.

- Applied Materials said Micron and SK hynix will be founding partners at its EPIC Center, a planned $5 billion semiconductor equipment R&D effort.

- SK Group Chairman Chey Tae-won said AI-driven wafer shortages could continue until 2030 and remain above 20% because HBM consumes large amounts of wafer capacity.

- TSMC reported January-February 2026 revenue of NT$718.91 billion, up 29.9% year over year.

- Public reporting still lacks customer-by-customer High-NA insertion dates, layer choices and product-specific deployment schedules.

Glossary

Extreme Ultraviolet (EUV) lithography — Advanced chip-patterning technology using 13.5 nm light for leading-edge semiconductor manufacturing.

High Numerical Aperture (High-NA) EUV — The next EUV platform generation aimed at reducing process complexity and improving patterning economics at future nodes.

High Bandwidth Memory (HBM) — Stacked DRAM used near AI accelerators to deliver very high memory bandwidth.

HBM4 — The next major HBM generation, positioned for AI platforms such as NVIDIA Vera Rubin.

Dynamic Random Access Memory (DRAM) — Mainstream volatile memory used in servers, PCs, mobile devices and the base dies behind HBM.

Computational lithography — Software-intensive correction and optimization used to make mask patterns print accurately on wafers.

Physical verification — Design checks that confirm a chip layout can be manufactured reliably under process rules.

Advanced packaging — Technologies that connect or stack multiple chips closely to improve bandwidth, power and system performance.

Uptime — The share of time a tool is available and operating as intended in a manufacturing environment.

Cleanroom — A tightly controlled fabrication space designed to minimize particles, contamination and process variation.