## Episode Summary
In this episode, we cover:
- **A Scalable Open-Source QEC System with Sub-Microsecond Decoding-Feedback Latency** (arXiv)
- **Dynamic Sparse Attention: Access Patterns and Architecture** (arXiv)
- **SpacemiT K3 “16-core” RISC-V SoC system information and (early) benchmarks - CNX Software** (google_riscv)
- **RISC-V Mentorship Taught Me the RISC-V ISA Is Far More Than a Reference Manual** (riscv_news)
- **One ISA, Infinite Use Cases: RISC-V and the Road to Workload-Specific Silicon** (riscv_news)
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