As systems become more software-defined, the traditional development model of waiting for hardware before serious software validation begins is no longer sustainable. Software teams need platforms earlier. Hardware teams need realistic workloads sooner. Verification teams need better ways to expose system-level issues before tapeout. We will look at how digital twins are becoming the shared foundation for this new HW/SW co-development model. Using virtual platforms, hardware emulation, and FPGA prototyping, teams can start earlier, collaborate more closely, and design/optimize/validate with greater confidence. We will also discuss new system-level verification challenges in power, performance, and DFT, showing how pre-silicon Hardware platforms can help teams find critical issues earlier and deliver more robust software-defined systems.

Artificial intelligence is accelerating semiconductor development, but more compute, more automation, and more engineering data do not automatically create better decisions. As design and manufacturing workflows become increasingly AI-enabled, a new constraint is emerging: trust. In this episode, Dr. Jim Shiely builds on themes from his Patterning the Singularity leadership work to explore the semiconductor industry’s “trust bottleneck” and why trustworthy engineering intelligence is becoming essential to future innovation.

On this month's episode of Brains and Machines, five engineers debate neuromorphic sensing and learning. Recorded at the Neuromorphic Hardware and Algorithms conference at the University of Sussex, the panel explores whether events and spikes are the right framework for integrating sensor modalities, motor control, and learning across systems. They also examine commercial directions and revisit the perennial question: what is neuromorphic engineering?

The panelists are:

• Dr. Chiara Bartolozzi (Italian Institute of Technology)
• Dr. Federico Corradi (Eindhoven University of Technology)
• Dr. James Knight (University of Sussex)
• Dr. Laura Kriener (Institute of Neuroinformatics, Zurich)
• Dr. Sebastian Siegel (Peter Grünberg Institute, Jülich)

The session is chaired by Dr. Sunny Bains (University College London), followed by a discussion with Dr. Giulia D’Angelo (Czech Technical University in Prague) and Professor Ralph Etienne-Cummings (Johns Hopkins University).

For years, AI infrastructure was measured at the scale of the data center. That's changed. In this episode, Neeraj Paliwal explains why the rack has become the indivisible unit of a modern AI system — designed as one system rather than a collection of servers — and why performance is no longer defined by the compute in any single box, but by how efficiently data moves, is stored, and is secured across the entire rack.

 And getting there depends on co-designing the silicon, memory, interconnect, and packaging together, with the IP foundation turning concentrated power into usable compute.

As AI agents grow more capable, the question of trust becomes increasingly critical, especially in complex engineering environments like semiconductor and PCB design. Siemens EDA and NVIDIA are tackling that challenge head-on, combining deep EDA domain expertise with cutting-edge AI infrastructure to deliver a new generation of agentic AI capabilities for engineering teams.

In this episode, we sit down with Amit Gupta, Chief AI Strategy Officer at Siemens EDA, and Tim Costa, VP and GM of Industrial and Computational Engineering at NVIDIA, to explore how their collaboration is shaping the future of EDA workflows. Together, they discuss domain-scoped AI agents that don't just execute tasks but verify their own outputs using physics-based EDA software validation, purpose-built to support the demands of long-running engineering workflows.

We dig into what self-verifying agentic AI actually means in practice, what the Siemens and NVIDIA collaboration looks like under the hood, and what it delivers in terms of tool-calling reliability, token efficiency, result quality, and time-to-results for engineering teams working across the full EDA lifecycle.

In this month’s Brains and Machines podcast, Dr. Jeff Shainline talks  about superconducting neural hardware with Dr. Sunny Bains of University College London. Currently in development at Great Sky in Boulder, Colorado, the new systems will incorporate photonic interconnects and a neuromorphic approach to intelligence. Discussion follows with Dr. Giulia D’Angelo from the Czech Technical University in Prague and Professor Ralph Etienne-Cummings of Johns Hopkins University.

Some of the most critical semiconductor innovation today sits beneath intelligent systems, where data moves, connects, and scales. As architectures become more distributed, sensor-rich, and AI-driven, challenges in bandwidth, latency, power, and interoperability intensify. In this episode, we unpack the interface technologies driving this evolution: from automotive SerDes to advanced imaging and next-gen connectivity.

In this latest episode of Brains and Machines, Dr. Patty Stabile of the Eindhoven University of Technology chats with us about  her optical neural networks with ultra-low-latency processing, and the semiconductor optical amplifiers that make them possible. Discussion follows with Dr. Giulia D’Angelo from the Czech Technical University in Prague and Professor Ralph Etienne-Cummings of Johns Hopkins University.

In this episode of EE Times Current, we’ll dive into Physical AI — from humanoids and embodied agents to the chips, sensors, and systems that let machines see, move, and interact with us. Guiding us through this future of silicon is our host, Hezi Saar, Executive Director of Product Marketing at Synopsys. Hezi brings a front-row view of the semiconductor and AI landscape — and the people building it.

With advanced safety features, sophisticated sensors, and personalized temperature controls, software-defined vehicles require more power than ever before. Traditional automotive power systems simply can’t keep up with the demand. As the industry moves toward the adoption of 48-volt technology, a zonal architecture will play a critical role in this transition. This podcast covers why auto industry is undergoing a big E/E transition and the zonal architecture fundamentals, covering 48V power architectures, zonal E/E architecture, software-defined vehicles (SDV), and how integrated solutions such as 48V e‑fuses enable this transition.