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Intel is ready to ramp up the market for add-on cards. Their roadmap for Infrastructure Processing Units, which is what Intel calls a DPU, are focusing on a combination of ASICs and FPGAs. The ASIC model is a high-performance unit with very specific uses. The FPGA model is more programmable at the cost of peak output. The road map also lays out the future of Intel's plans for the next three years, maxing out at a unit capable of 800 Gbps by 2025. One of the keys to getting this kind of performance is writing software for the unit. Intel has launched the Infastructure Programmer Development Kit, or IPDK, which parallels their development of the similar DPDK for networks. All this and more on this week's Rundown. Head to GestaltIT.com/ for show notes.
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Intel is ready to ramp up the market for add-on cards. Their roadmap for Infrastructure Processing Units, which is what Intel calls a DPU, are focusing on a combination of ASICs and FPGAs. The ASIC model is a high-performance unit with very specific uses. The FPGA model is more programmable at the cost of peak output. The road map also lays out the future of Intel's plans for the next three years, maxing out at a unit capable of 800 Gbps by 2025. One of the keys to getting this kind of performance is writing software for the unit. Intel has launched the Infastructure Programmer Development Kit, or IPDK, which parallels their development of the similar DPDK for networks. All this and more on this week's Rundown. Head to GestaltIT.com/ for show notes.
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Follow our hosts on Social Media:
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Follow Gestalt IT:
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