Ben Titzer joins to talk about the history and future of WebAssembly, the design and implementation of V8's TurboFan optimizing compiler, and the Virgil programming language. We also discuss bringing high-level language features to constrained hardware, the V8 team's response to the Spectre and Meltdown side-channel attacks, and how to design high performance virtual machines.

Ben's Site: https://s3d.cmu.edu/people/core-faculty/titzer-ben.html

Ben on LinkedIn: https://www.linkedin.com/in/ben-l-titzer-6b78584/

Ben on Twitter: https://x.com/TitzerBL

Detailed Show Notes: https://microarch.club/episodes/1000

Kay Li joins to talk about custom hardware used in high-frequency trading, development workflows for FPGA and ASIC design, and why verification has become a bottleneck in the design process. We also discuss SiLogy, the startup Kay founded with Paul Kim to improve the design workflow, including their experience applying to and going through YCombinator, their initial target market, and how the platform could evolve over time.

Kay on LinkedIn: https://www.linkedin.com/in/kay-li-84924128b/

Kay on Twitter: https://twitter.com/silikayli

Detailed Show Notes: https://microarch.club/episodes/111

Rick Altherr joins to talk about working on hardware performance analysis tools at Apple during the PowerPC to x86 transition, building flight control software for internet satellites at Google, discovering vulnerabilities in baseboard management controllers, and much more. We also spend an extended portion of the conversation on Rick's current work in quantum computing, including comparing and contrasting with classical computing, and examining some of the challenges of interfacing with these machines today.

Rick's Site: https://www.kc8apf.net/

Rick on LinkedIn: https://www.linkedin.com/in/mxshift/

Rick on Mastodon: https://social.treehouse.systems/@mxshift

Rick on GitHub: https://github.com/mx-shift

Rick's Mentoring Sign-Up: https://calendly.com/mxshift

Detailed Show Notes: https://microarch.club/episodes/110

Matt Godbolt joins to talk about early microprocessors, working in the games industry, performance optimization on modern x86 CPUs, and the compute infrastructure that powers the financial trading industry. We also discuss Matt's work on bringing YouTube to early mobile phones, and the origin story of Compiler Explorer, Matt's well-known open source project and website.

Matt's Site: https://xania.org/

Matt on LinkedIn: https://www.linkedin.com/in/godbolt/

Matt on X: https://twitter.com/mattgodbolt

Matt on Mastodon: https://hachyderm.io/@mattgodbolt

Matt on Bluesky: https://bsky.app/profile/mattgodbolt.bsky.social

Detailed Show Notes: https://microarch.club/episodes/101

Nathanael Huffman joins to talk about the magic of FPGAs, the role they play in domains ranging from medical imaging to data centers, and how software development principles can be applied to logic design. We also discuss how Nathanael and the team at Oxide Computer Company built a new rack-scale computer while working remotely, and what exactly happens when it powers on and boots up.

Nathanael on LinkedIn: https://www.linkedin.com/in/nathanael-huffman-5128024a/

Nathanael on X: https://twitter.com/SyntheticGate

Nathanael on Mastodon: https://hachyderm.io/@SyntheticGate

Detailed Show Notes: https://microarch.club/episodes/100

Robert Garner joins for a fascinating tour of the last 50 years of computing, told through his experiences working alongside pioneers of the industry on projects like the optical mouse, the Xerox STAR workstation, Sun Microsystems’ SPARC instruction set architecture, and many more. We also discuss Robert’s work preserving and restoring systems at the Computer History Museum, and his upcoming book on the technical history of Ethernet.

Robert on LinkedIn: https://www.linkedin.com/in/robertgarner/

Computer History Museum: https://computerhistory.org/

Detailed Show Notes: https://microarch.club/episodes/11

Thomas Sohmers joins to discuss dropping out of high school at age 17 to start a chip company, lessons from the successes and failures of past processor architectures, the history of VLIW, and the new AI hardware appliances he and his team are building at Positron AI.

Thomas on X: https://twitter.com/trsohmers

Thomas' Site: https://www.trsohmers.com/

Show Notes

• Welcome Thomas Sohmers (00:01:22)
• Growing Up Around Computers (00:03:13)
• Digging Beneath the Software (00:05:56)
• Learning Python, C, and Arduino C (00:07:05) 
  • https://www.arduino.cc/reference/en/
• Learning About the Thiel Fellowship (00:07:44) 
  • https://thielfellowship.org/
• Starting Research at MIT at age 14 (00:09:24)
• Dropping out of High School and Starting Thiel Fellowship at age 17 (00:10:36)
• MIT ISN Lab (00:11:09) 
  • https://isn.mit.edu/
• Evaluating ARM Processors for High Performance Computing (00:11:28) 
  • https://en.wikipedia.org/wiki/ARM_architecture_family
• ARM Calxeda Processor (00:11:38) 
  • https://en.wikipedia.org/wiki/Calxeda
  • https://www.zdnet.com/article/what-the-death-of-calxeda-means-for-the-future-of-microservers/
• Scaling Out Low Power Processors for Data Center Compute (00:12:27)
• Incorporating REX Computing (00:13:42) 
  • http://rexcomputing.com/
  • https://fortune.com/2015/07/21/rex-computing/
• Facebook and the Open Compute Project (00:14:18) 
  • https://www.opencompute.org/
• Deciding Against Arm (00:14:49)
• ARMv8 (00:15:12) 
  • https://en.wikichip.org/wiki/arm/armv8
• Deciding to Design a New Architecture (00:16:26)
• Multiflow (00:18:23) 
  • https://en.wikipedia.org/wiki/Multiflow
• Good Architecture Ideas from the Past (00:18:35)
• Thomas' Talk at Stanford (00:18:59) 
  • https://youtu.be/ki6jVXZM2XU
• RISC vs. CISC Debate (00:19:37) 
  • https://cs.stanford.edu/people/eroberts/courses/soco/projects/risc/risccisc/
• SPARC Instruction Set (00:20:04) 
  • https://en.wikipedia.org/wiki/SPARC
• The Importance of History (00:20:58)
• RISC Came Before CISC (00:23:08)
• CDC 6600 (00:23:20) 
  • https://en.wikipedia.org/wiki/CDC_6600
• Load-Store Architecture (00:23:53) 
  • https://en.wikipedia.org/wiki/Load–store_architecture
• IBM System/360 (00:24:02) 
  • https://en.wikipedia.org/wiki/IBM_System/360
• PowerPC (00:24:29) 
  • https://en.wikipedia.org/wiki/PowerPC
• VLIW (00:25:02) 
  • https://en.wikipedia.org/wiki/Very_long_instruction_word
• ELI-512 and Josh Fisher (00:25:05) 
  • https://dl.acm.org/doi/pdf/10.1145/800046.801649
  • https://en.wikipedia.org/wiki/Josh_Fisher
• Floating Point Systems, Inc. (FPS) (00:26:45) 
  • https://en.wikipedia.org/wiki/Floating_Point_Systems
• Multiflow Compiler (00:26:52) 
  • https://www.cs.yale.edu/publications/techreports/tr364.pdf
• Instruction Level Parallelism (00:27:33) 
  • https://en.wikipedia.org/wiki/Instruction-level_parallelism
• Intel Itanium (00:28:20) 
  • https://en.wikipedia.org/wiki/Itanium
• Itanium is not a VLIW Architecture (00:29:04)
• Explicitly Parallel Instruction Computer (EPIC) (00:29:22) 
  • https://en.wikipedia.org/wiki/Explicitly_parallel_instruction_computing
• x86 and Pentium (00:30:18) 
  • https://en.wikipedia.org/wiki/X86
  • https://en.wikipedia.org/wiki/Pentium
• Impact of Branch Prediction and Caching on Determinism (00:31:34) 
  • https://en.wikipedia.org/wiki/Branch_predictor
  • https://en.wikipedia.org/wiki/CPU_cache
• Why Itanium Failed (00:32:27)
• REX's NEO Architecture (00:35:29) 
  • http://rexcomputing.com/#neoarch
• Hard Real-Time Determinism (00:35:41)
• Scratchpad Memory (00:35:54) 
  • https://en.wikipedia.org/wiki/Scratchpad_memory
• Removing Memory Management (TLB, MMU, etc.) (00:36:18) 
  • https://en.wikipedia.org/wiki/Translation_lookaside_buffer
  • https://en.wikipedia.org/wiki/Memory_management_unit
• ALU, FPU, and Register Files (00:37:14) 
  • https://en.wikipedia.org/wiki/Arithmetic_logic_unit
  • https://en.wikipedia.org/wiki/Floating-point_unit
  • https://en.wikipedia.org/wiki/Register_file
• Benefits of Removing Implicit Caching Layers (00:38:30)
• VLIW in Signal Processing (00:39:51) 
  • https://en.wikipedia.org/wiki/Digital_signal_processor
• VLIW Won in a Silent Way (00:40:49)
• Original Reason for Hardware-Managed Caching (00:41:26)
• Impact of VLIW and Software-Managed Memory on Compile Times (00:42:41) 
  • http://www.ai.mit.edu/projects/aries/Documents/vliw.pdf
• LLVM and Sufficiently Advanced Open Source Compilers (00:42:49) 
  • https://llvm.org/
• Apple Transition from PowerPC to x86 to Arm (00:43:31) 
  • https://en.wikipedia.org/wi...

Philip Freidin joins to talk about developing a passion for electronics and computer architecture while growing up in Australia, getting started on the PDP-8, his grand plan to work on AMD bit-slice processors, and plenty more.

Philip on X: https://twitter.com/PhilipFreidin

Philip’s Site: http://www.fliptronics.com/

Show Notes

• Welcome Philip Freidin (00:01:02)
• Growing up in Australia (00:03:25)
• Teletype Model 33 ASR (00:07:10)
  • https://en.wikipedia.org/wiki/Teletype_Model_33
• Kilocore Ticks (00:09:15)
• General Electric GE-235 (00:11:50)
  • https://en.wikipedia.org/wiki/GE-200_series
  • https://www.computerhistory.org/revolution/mainframe-computers/7/178/720
• Learning Fortran and Algol (00:16:03)
  • https://en.wikipedia.org/wiki/Fortran
  • https://en.wikipedia.org/wiki/ALGOL
• Peeling Back Abstractions (00:19:02)
• Working on Hospital Electronics (00:19:51)
• Making a Digital Clock at Age 14 (00:24:31)
• DEC PDP-8 (00:26:26)
  • https://en.wikipedia.org/wiki/PDP-8
• Why DEC Used the PDP Name (00:29:40)
  • https://en.wikipedia.org/wiki/Programmed_Data_Processor
• Glass Teletypes (00:31:01)
• Programming in FOCAL and Fortran (00:31:31)
  • https://en.wikipedia.org/wiki/FOCAL_(programming_language)
• Linking and Loading with Paper Tape (00:33:27)
  • https://en.wikipedia.org/wiki/Punched_tape
• DECtape (00:35:57)
  • https://en.wikipedia.org/wiki/DECtape
• Designing a Floppy Disk Drive System for PDP-8 (00:37:01)
• PDP-8 OMNIBUS Backplane (00:37:38)
  • https://gunkies.org/wiki/OMNIBUS
• Software Support for Floppy Disk Drive (00:39:42)
• OS/8 Operating System (00:40:26)
  • https://en.wikipedia.org/wiki/OS/8
• DEC Manuals (00:43:53)
  • https://bitsavers.org/pdf/dec/
• The Onion Model for Abstraction (00:45:21)
• Understanding Computer Architecture (00:48:29)
• Moving to the PDP-11 (00:52:31)
  • https://en.wikipedia.org/wiki/PDP-11
• PDP-11/34 and Microcode (00:54:36)
  • https://gunkies.org/wiki/PDP-11/34
• 74181 ALU Chip (00:54:49)
  • https://en.wikipedia.org/wiki/74181
• DEC VAX 11/780 (00:55:29)
  • https://gunkies.org/wiki/VAX-11/780
• 74182 Chip (00:57:55)
  • https://www.ti.com/lit/ds/symlink/sn54s182.pdf
• Performance Optimization by Understanding Dependencies (01:00:01)
• DSP and FPGAs (01:01:06)
  • https://en.wikipedia.org/wiki/Field-programmable_gate_array
  • https://en.wikipedia.org/wiki/Digital_signal_processing
• FIR Filter (01:05:12)
  • https://en.wikipedia.org/wiki/Finite_impulse_response
• TMS320 (01:06:16)
  • https://en.wikipedia.org/wiki/TMS320
• Tradeoffs Between DSP Chips and FPGAs (01:11:46)
• Applications of FIR Filters (01:13:38)
• FPGAs in Communication Systems (01:15:28)
• Optimization Starts with Algorithms (01:16:20)
• Misuse of Floating Point (01:16:55)
  • https://en.wikipedia.org/wiki/Floating-point_unit
• Joining AMD (01:18:57)
• Bit Slice (01:19:53)
  • https://en.wikipedia.org/wiki/Bit_slicing
• Intel 3002 (01:20:52)
  • https://www.cpu-zone.com/3002/intel3002.pdf
• MMI 6701 (01:21:00)
  • https://www.cpushack.com/2011/03/31/cpu-of-the-day-mmi-6701-bit-slice/
• AMD Am2901 (01:22:16)
  • https://www.righto.com/2020/04/inside-am2901-amds-1970s-bit-slice.html
• Data General Eclipse MV/8000 (01:23:24)
  • https://en.wikipedia.org/wiki/Data_General_Eclipse_MV/8000
• Mini Supercomputers (01:24:13)
  • https://en.wikipedia.org/wiki/Minisupercomputer
• Designing first chip at age 12 (01:25:11)
• RS Latch (01:28:03)
  • https://www.allaboutcircuits.com/textbook/digital/chpt-10/s-r-latch/
• 74LS279 (01:28:39)
  • https://www.ti.com/lit/ds/symlink/sn74ls279a.pdf
• Learning about Bit Slice (01:30:00)
• R&D Electronics (01:30:53)
• Internal and External Applications Engineers (01:32:45)
• Becoming Australia’s First Field Applications Engineer (01:36:11)
• MMI Programmable Array Logic (PAL) (01:37:08)
  • https://en.wikipedia.org/wiki/Programmable_Array_Logic
• Meeting the Bit Slice Designers (01:38:03)
• S-100 Bus (01:39:01)
  • https://en.wikipedia.org/wiki/S-100_bus
• Teaching at University (01:39:50)
• Sending Resume to AMD (01:42:27)
• AMD Interview (01:43:16)
• Moving to the U.S. (01:45:40)
• AMD’s Secret RISC CPU (01:46:19)
• Am29000 (01:50:19)
  • https://en.wikipedia.org/wiki/AMD_Am29000
• Why RISC over CISC? (01:51:38)
  • https://cs.stanford.edu/people/eroberts/courses/soco/projects/risc/risccisc/
• Memory is free (01:52:40)
• Compiler Optimizations (01:56:36)
• Mapping Instructions to Opcodes (02:00:15)
• RISC-V and Fixed-Position Operands (02:01:16)
• CISC Became RISC (02:03:47)
• Register Windows on Am29000 (02:05:22)
  • https://danielmangum.com/posts/retrospective-sparc-register-windows/
• Texas Instruments TMS9900 (02:07:04)
  • https://en.wikipedia....

In this introductory episode, I detail my mission and goals for the podcast. Subscribe for new episodes every other Wednesday!

• (00:00) - Intro

• "A Three Year Bet on Chip Design"

More: https://microarch.club/episodes/0