What does it take to turn 3D IC from a buzzword into a successful reality, and how early should you start thinking about system-level planning?

Get practical insight into why system-level planning is essential from day one of your 3D IC project. You’ll learn how to avoid costly design iterations, streamline collaboration across domains, and accelerate time to market with co-design and early simulation strategies.

In this episode of the Siemens 3D IC podcast, host John McMillan sits down with Tony Mastroianni, Advanced Packaging Solutions Director at Siemens EDA. With decades of experience in design, integration, and manufacturing, Tony shares why system-level planning is a critical first step, not an afterthought, when tackling 3D IC projects.

They unpack the common pitfalls of treating package design as isolated from system goals and how the shift from chip-centric to system-centric thinking can redefine success in high-density, high-performance integration. Tony also discusses the value of co-design, early simulation, and cross-disciplinary collaboration to reduce iterations, control cost, and accelerate time to market.

If you're involved in semiconductors, EDA tools, IC packaging, or advanced integration, this episode offers clear, actionable insight into the future of electronics design.

Recommended for: System architects, IC designers, semiconductor packaging engineers, EDA tool users, design managers, and anyone working on or interested in 3D IC implementation.

What You’ll Learn in this Episode:

From a dozen transistors per chip to trillions: What 30 years in the industry can teach you. (1:32)

How to realize that 3D IC workflows must change within a company. (5:50) 

What type of resistance can be expected when implementing design or workflow changes? (07:00)

What internal changes are required better to address the cross-disciplinary demands of 3D IC system design? (9:30)

Final thoughts (23:00)

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As mentioned during the show: Episode 1: An Introduction to 3D IC

https://blogs.sw.siemens.com/podcasts/3d-ic/an-introduction-to-3d-ic-ep-1/

Why is thermal analysis no longer an afterthought in 3D IC design—and what is Siemens doing to empower engineers across every step of the process?

In this episode of the Siemens EDA Podcast Series on 3D IC chiplet ecosystems, host John McMillan welcomes András Vass-Varnai, 3DIC Solutions Engineer at Siemens Digital Industries, to spotlight one of the most critical (and often underestimated) challenges in modern chip design: thermal analysis.

As power densities soar and chiplets stack closer together than ever before, effective thermal management is essential—not just for performance, but for reliability, lifespan, and product feasibility. András explores how Siemens is bridging the gap between design, packaging, and thermal engineering through integrated toolchains and a new generation of digital twins.

Whether you're a silicon designer, package architect, or thermal analyst, this episode offers valuable insights into the future of collaborative thermal modeling, IP protection, and real-time simulation integration.

What You’ll Learn in this Episode:

Andrass Vass-Varnai’s background and current role at Siemens EDA (1:25)

How is the shift to 3D IC packaging affecting thermal analysis? (2:35)

What is the issue with the current approach to thermal analysis? (4:20)

What is the significance of having thermal models for the customers? (6:50)

Siemens' vision for the ideal future workflow (11:00)

Conclusion and future outlook (17:00)

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Why are companies rapidly adopting fan-out wafer-level packaging (FO-WLP)—and how does this shift impact the traditional chip design process?

In this episode of the Siemens 3D IC Podcast Series, host John McMillan is joined by Chris Cone, IC Packaging Product Marketing Manager at Siemens EDA, to explore how fan-out wafer-level packaging is transforming advanced semiconductor packaging workflows.

Chris shares his journey from analog design engineer to packaging and automation expert, and breaks down the growing need for intelligent, automated workflows that support the increasing complexity and size of modern designs.

They discuss how new IC packaging techniques demand more automation, design iteration, and cross-functional collaboration than ever before—and why building a replayable, flexible automation language is the key to faster, scalable design success.

Whether you're a layout engineer, SI/PI analyst, or replay coordinator, this episode will show you how to streamline your process using a common design framework and why human-readable automation is the next big leap in fan-out design.

What You’ll Learn in this Episode:

Chris Cone’s journey from analog IC designer to Siemens EDA packaging lead (1:10)

What is fan-out wafer-level packaging, and why is it gaining traction? (1:50)

How FOWLP is different than a traditional BGA design process (2:30)

The four major phases in a fan-out packaging workflow, from tech setup to final verification (3:45)

What is the impact on different roles, such as a package designer, layout designer, engineer, signal integrity, power, and integrity analysis? (8:00)

The three essential traits of successful design automation (10:00)

Key takeaways from real-world projects using Siemens’ automated packaging flows (11:45)

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As 3DIC adoption ramps up, it’s becoming clear: microarchitecture needs a rethink. So how do you design hardware that can survive and thrive in the new era of stacked silicon?

In this episode of the Siemens 3D IC Podcast, host John McMillan speaks with Pratyush Kamal, Director of R&D for 3D IC Solutions Engineering at Siemens Digital Industries. With decades of experience spanning Qualcomm and Google, Pratyush brings deep insight into the evolution of IC design—and how 3D integration is transforming every layer of the design stack.

From redefining how and when microarchitecture decisions are made to overcoming the thermal, testing, and failure analysis challenges that come with 3D stacking, this episode dives into the critical topics design teams need to understand today.

You’ll also hear how AI, automation, and cross-disciplinary expertise are reshaping team roles—and why software-defined silicon is redefining the design process itself.

This episode is essential listening for IC architects, system designers, and packaging engineers navigating the transition to advanced 3D IC platforms.

What You’ll Learn in this Episode:

What is microarchitecture in IC design? (2:30)

What does microarchitecture mean in 3D IC design? (3:20)

How early do we need to consider microarchitecture in 3D IC design? (4:45)

The main issues system designers face concerning the increasing complexity of microarchitecture (5:50)

How are roles changing to enable a more holistic outlook on 3D IC microarchitecture? (9:15)

What would enable non-silo design practice? (11:00)

Closing thoughts (11:55)

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Explore More on 3D IC Innovation & Research:

Deepen your understanding of 3D IC design with these valuable resources:

Home | UCIe Consortium

Die Stacking (3D) Microarchitecture | IEEE Conference Publication | IEEE Xplore

Fine grain 3D integration for microarchitecture design through cube packing exploration | IEEE Conference Publication | IEEE Xplore

Opportunities, Challenges and Mitigations in 3DIC Design, Test, and Analyses | IEEE Conference Publication | IEEE Xplore

Design-Aware Partitioning-Based 3-D IC Design Flow With 2-D Commercial Tools | IEEE Journals & Magazine | IEEE Xplore

How are 3D Integrated Circuits (3D ICs) revolutionizing semiconductor design, and what role do advanced packaging technologies play in this transformation?

In this episode of the Siemens EDA Podcast Series on 3D IC chiplet ecosystems , host John McMillan sits down with Jan Vardaman, President and Founder of TechSearch International, to discuss the latest advancements in 3D IC technology, heterogeneous integration, and advanced semiconductor packaging.

Jan shares insights on why 3D ICs are gaining traction, the key industry drivers behind their adoption, and how companies are overcoming integration challenges. She also explores the role of chiplets, AI-driven design processes, and supply chain shifts in shaping the future of semiconductor manufacturing.

Whether you're a semiconductor engineer, a tech enthusiast, or a business leader looking to stay ahead in the industry, this episode is packed with valuable insights into the next generation of IC design.

What You’ll Learn in this Episode:

The main drivers for advanced integration ( heterogeneous or homogeneous silicon) from a technology and business point of view. (02:10)

Specific market segments and industries that are driving these advanced integrations, including chiplet designs ( 3:10 )

The different needs and requirements for packaging ( 6:50 )

How different substrate materials (silicon, RDL, glass core, organic interposer bridges, etc.) compete and complement each other in specific applications ( 8:20 )

Siemens’ Innovator3D IC Platform (10:55)

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One of the best ways to speed-up product development is to integrate test as early as possible in the design cycle. This shift-left strategy becomes even more critical when advanced IC designs evolve from a single die per package to complex systems with multiple dies integrated into a package. These 2.5D and 3D multi-die design strategies pose some interesting challenges and opportunities for test.

Today, David Lyell interviews Joe Reynick, the Tessent Product Engineering Manager for Siemens EDA. He’ll help us to understand the complexity of development tests for 3D and 2.5D packages.

In this episode, you’ll learn about the challenges of performing comprehensive tests on 3D and 2.5D designs. You’ll also hear about the factors that you need to consider while planning for 3D DFT and IP tests. Additionally, you’ll hear about how 2.5D tests and 3D tests can complement each other.

What You Will Learn In This Episode:

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3D IC designs are complex puzzles that engineers have to solve to achieve high performance and reliability. While vertical stacking gives more design options, it also increases the possible number of defective arrangements. There is no one-design-fits-all in 3D IC; engineers must understand their needs and create designs that meet them.

Today, John McMillan interviews John Ferguson, Product Management Director of Calibre DRC Technologies at Siemens Digital EDA. He’ll help us understand the complexity of 3D IC designs and how it impacts their reliability.

In this episode, you’ll learn about some of the guardrails that increase the reliability of 3D IC devices. You’ll also hear about some of the common challenges an engineer has to solve while designing such devices. Additionally, you’ll get some tips on where to start with 3D IC designs to minimize cost and maximize performance.

What You Will Learn in this Episode:

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A common challenge faced when actualizing new technologies such as 3D IC is the lack of specialized tools to mass assemble them. That’s because their designs are normally developed by R&D teams that view commercialization as someone else’s task. At the moment, organizations are working to create and perfect the tools need to assemble 3D IC chips.

Today, John McMillan interviews John Ferguson, Director of Product Management, Dusan Petranovic, Principal Technologist, and Steve McKinney, Account Technology Manager. They’ll help us understand what a 3D IC verification workflow might look like.

In this episode, you’ll learn about the challenges associated with 3D IC integration and the components required to make it possible. You’ll also learn about the upgrades that have to be made to make 3D IC assembly possible. Additionally, you’ll hear about parasitic extraction and the tools available to execute it.

What You Will Learn In This Episode:

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One of the challenges of designing 3D IC chips is getting data from different sources in different formats to work together. You also need a solution that allows you to verify different components such as the interposer, the package, and the die together. Siemens solution allows you to combine data from different sources and handle the verification process collectively.

Today, John McMillan interviews Mike Walsh, Technical Applications Engineering Director of the Technical Solutions Sales Team at Siemens Digital EDA. He’ll help understand what a 3D IC physical design workflow might look like.

In this episode, you’ll learn about the challenges associated with 3D IC physical design. You’ll also learn about how Siemens solution enables design teams to use data received in different formats. Additionally, you’ll learn why it's important to keep verification in mind early on in the design process.

What You Will Learn in this Episode:

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For 3D IC to achieve its full potential there is a need to utilize cost-effective front-end design approaches. This is because different microarchitectures will result in different physical sizes, power performance, and cost of production. One of the solutions that have been successfully deployed is the high-level predictive analysis which helps in figuring out optimal architectures for specific cases.

In this episode, John McMillan interviews Anthony Mastroianni, the 3D IC Solutions Architect Director at Siemens Digital Industries Software. And, Gordon Allan, Product Manager for Verification IP Solutions at Siemens EDA. They’ll help us understand 3D IC front-end aspects and the latest developments in this field.

In this episode, you’ll learn how predictive analytics can be utilized to make 3D IC design faster and cheaper. You’ll also learn what 3D IC front-end design involves and the best way of approaching it. Additionally, you’ll hear about what Siemens is doing to contribute towards making the design process more efficient.

What You Will Learn in this Episode:

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