Condor Currents

Condor Currents

By Condor ComputingTechnologyTech News
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Condor Currents episodes

  • Pipeline-Native Transformers: Co-Designing Model Architecture and CPU Inference for Bandwidth-Efficient Autoregressive Decode
    ## Episode Summary
    In this episode, we cover:
    - **Pipeline-Native Transformers: Co-Designing Model Architecture and CPU Inference for Bandwidth-Efficient Autoregressive Decode** (arXiv)
    - **Elastic KV Cache for LLM Serving:A Working Reclamation Mechanism, and Why Chunked Prefill Already Closes the Gap** (arXiv)
    - **Design of a low-power RISC-V based intelligent endoscopy detection processor: EndoRISC-V - Nature** (google_riscv)
    - **Prompt to tape out: Autonomous AI agent builds 1.5 GHz RISC-V CPU - Adafruit** (google_riscv)
    - **Armaan Gomes and Friends Deliver Playable Doom on a Whole New Platform: A Custom RISC-V CPU - Hackster.io** (google_riscv)
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    *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
    0 min
  • Architecting the Next Generation of Asynchronous, Distributed GPUs for the AI Era
    ## Episode Summary
    In this episode, we cover:
    - **Architecting the Next Generation of Asynchronous, Distributed GPUs for the AI Era** (arXiv)
    - **TreeWY: Speculative Verification for Gated DeltaNet Hybrids** (arXiv)
    - **RISC-V: The Open-Source Revolution in CPU Architecture - Design And Reuse** (google_arch)
    - **RISC-V extensions for high performance embedded computing ... - eeNews Europe** (google_riscv)
    - **RISC-V CPU Performance Up 8x In Five Years: SiFive HiFive Unmatched To SpacemiT K3 - Phoronix** (google_riscv)
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    *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
    0 min
  • SPICE: Speculative Prefetching with Low-Rank Expert Surrogates and Heterogeneous Orchestration for MoE Inference Acceleration
    ## Episode Summary
    In this episode, we cover:
    - **SPICE: Speculative Prefetching with Low-Rank Expert Surrogates and Heterogeneous Orchestration for MoE Inference Acceleration** (arXiv)
    - **Assessing Triple Modular Redundancy for Wide-Link, Low-Latency NoC Routers: Reliability and Physical Design Challenges** (arXiv)
    - **The RISC-V Vector Extensions for AI - Jon Peddie Research** (google_riscv)
    - **StarFive Dubhe-100 – A 64-bit, RVA23-compliant RISC-V core for high-performance applications - CNX Software** (google_riscv)
    - **StarFive Targets High-Performance Compute Workloads with Its New Dubhe-100 RISC-V Core Design - Hackster.io** (google_riscv)
    ---
    *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
    16 min
  • Formal Performance and Compile Time Guarantees for Compiler Optimization Heuristics
    ## Episode Summary
    In this episode, we cover:
    - **Formal Performance and Compile Time Guarantees for Compiler Optimization Heuristics** (arXiv)
    - **Beyond Binary Priorities: Multi-Tier SLA Scheduling for Large Language Model Serving** (arXiv)
    - **AheadComputing Introduces Breakthrough CPU Architecture for General-Purpose Computing, With Jim Keller on Board - TechPowerUp** (google_arch)
    - **Deja Vu: A Brief History of Every Mac CPU Architecture - How-To Geek** (google_arch)
    - **Linux Kernel 7.2 Officially Released with Cache-Aware Scheduling, USB4STREAM, and Major AMD Improvements - Linux Journal** (google_riscv)
    ---
    *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
    17 min
  • From Retrieved Context to Runtime Control: Adaptive Compression for Edge-based RAG
    ## Episode Summary
    In this episode, we cover:
    - **From Retrieved Context to Runtime Control: Adaptive Compression for Edge-based RAG** (arXiv)
    - **DTX: A Throughput-First Training Accelerator for Diffusion and Transformer Models** (arXiv)
    - **SpacemiT K3 “16-core” RISC-V SoC system information and (early) benchmarks - CNX Software** (google_riscv)
    - **NextSilicon Productizes Arbel RISC-V Core Into 64-Core Enterprise Processor - Quantum Zeitgeist** (google_arch)
    - **Using a Performance Model to Implement a Superscalar CVA6** (riscv_news)
    ---
    *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
    0 min
  • A Thread-Register Decoupled GPU Execution Model for Efficient Tensor Computation
    ## Episode Summary
    In this episode, we cover:
    - **A Thread-Register Decoupled GPU Execution Model for Efficient Tensor Computation** (arXiv)
    - **Performance Verification of the AmpereOne CPU Core** (arXiv)
    - **Intel says Nova Lake, its next major CPU architecture, is coming to desktop PCs before servers - TechSpot** (google_arch)
    - **Bit-Brick K1: Raspberry Pi 5 alternative with different CPU architecture, M.2 and PCIe support launches - Notebookcheck** (google_arch)
    - **India unveils a homegrown dual-core 1GHz RISC-V processor, the DHRUV64 - The Register** (google_riscv)
    ---
    *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
    0 min
  • FPGA Lifecycle Management for RISC-V Systems
    ## Episode Summary
    In this episode, we cover:
    - **FPGA Lifecycle Management for RISC-V Systems** (arXiv)
    - **CTTE: An Open Dual-Protocol RISC-V Trace Encoder for N-Trace and E-Trace** (arXiv)
    - **Migration Using Context Cache for Multicore RISC‐V Processor - Wiley Online Library** (google_riscv)
    - **RISC-V vs ARM: Which Instruction Set Architecture Will Dominate the Future? - Electropages** (google_arch)
    - **Performance aware shared memory hierarchy model for multicore processors - Nature** (google_arch)
    ---
    *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
    0 min
  • ETHEREAL: A 25.6-$μ$s/inf. Low-latency Event-driven Graph-neural-network Processor for High-resolution Vision at the Edge
    ## Episode Summary
    In this episode, we cover:
    - **ETHEREAL: A 25.6-$μ$s/inf. Low-latency Event-driven Graph-neural-network Processor for High-resolution Vision at the Edge** (arXiv)
    - **Dryas: A Reprogrammable Engine for High-Speed Interconnect Tracing and Analysis** (arXiv)
    - **The RISC-V Vector Extensions for AI - jonpeddie.com** (google_riscv)
    - **The Evolution of CPU Architectures – From Intel 4004 To Modern SoCs - wccftech.com** (google_arch)
    - **QuMA: Researchers Develop Quantum Microarchitecture that "Bridges the Gap" in Processor System Stacks - IEEE Computer Society** (google_arch)
    ---
    *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
    0 min
  • Testing the EPYC Conjecture on Real Hardware: MoA-Guided Dense Matrix Multiplication on NCSA Delta (AMD EPYC 7763 Milan)
    ## Episode Summary
    In this episode, we cover:
    - **Testing the EPYC Conjecture on Real Hardware: MoA-Guided Dense Matrix Multiplication on NCSA Delta (AMD EPYC 7763 Milan)** (arXiv)
    - **Beyond Capacity: Scalable MoE LLM Inference via High-Bandwidth Flash with Direct GPU and HBM Paths** (arXiv)
    - **RISC-V Mentorship Taught Me the RISC-V ISA Is Far More Than a Reference Manual** (riscv_news)
    - **AheadComputing Introduces Breakthrough CPU Architecture for General-Purpose Computing, With Jim Keller on Board - techpowerup.com** (google_arch)
    - **NextSilicon to Productize Arbel RISC-V Core Into 64-Core Enterprise Processor for AI and HPC - businesswire.com** (google_riscv)
    ---
    *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
    17 min
  • SLAC: Access-Driven CPU-to-GPU Side-channel Attacks via System-Level Cache on Apple Silicon
    ## Episode Summary
    In this episode, we cover:
    - **SLAC: Access-Driven CPU-to-GPU Side-channel Attacks via System-Level Cache on Apple Silicon** (arXiv)
    - **Potential Applications of HBF in LLM Serving Systems** (arXiv)
    - **Checking In On The ISA Wars And Its Impact On CPU Architectures - Hackaday** (google_arch)
    - **Support RAJA and Scientific Applications on RVV Architectures** (riscv_news)
    - **Zhihe A210 octa-core RISC-V SoC with 12 TOPS NPU powers SoM-based development board - CNX Software** (google_riscv)
    ---
    *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*
    0 min

About Condor Currents

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Condor Currents delivers concise breakdowns of the latest computer architecture research and RISC-V developments. Each episode covers recent arXiv papers on data prefetching, branch prediction, and…