peepaws computer does nothing

who's peepaw, whats the goal

to build and understand the inner workings of an 8 bit computer and

maybe one day pass it on to a grand kid

this episode -nop test

do a nop test, that is get the z80 up and running executing the nop

instruction

using the facilities of an arduino mega board running flash forth to

do that, talk about pictures

why? flash forth is interactive, without being such a big

application itself. Happily runs on an atmega328

why the mega, oodles and oodles of io, so emulating hardware should

be a snap

use the microcontroller board to provide 5 volts, clock signal and

data to get the z80 up and running

use the logic probe to see if there is activity on the address

bus

wiring up

hot glued solderless breadboard on to an arduino mega protoshield,

white wire is the logicprobe input

power and ground first

clock, blue

control lines int, nmi, wait busrq and reset

orange wires data bus

address lines go around the chip clockwise from the clock signal

(blue wire) we'll be probing A0, next to the ground line

1.logicprobe.jpg

2.power.jpg

3.clock.jpg

4.control.signals.jpg

5.data.jpg

6.ready.to.probe.jpg

z80-pinout.jpg

2560-pinout.jpg

Click the thumbnail

to see the full-sized image

fixing some words, refactoring some words, defining new words

fixed the data processing word to us the input on pin e4 (digital 2)

not the output on pin h6 (digital 9)

changed freq= some value to simply pulse, not interested in the

specific frequency

split clock and logic probe init words

added some words to control the reset line reset and run

added a word step that allows for single clock pulses

the test, mega board plugged into laptop, seral terminal running

spool up the logic probe

spool up the microcontroller board setting up a port to provide data

on the z80 data bus (rudimentary rom)

add 5 volts

initialize and start the clock

probe the clock line

probe a0 line

a little more to see what else we can discern

single step to reset

probe m1

single step to reset

add halt instruction

probe halt line

this is output captured from the tests run on the show. lines that

begin with a back slash are comments used as narration

ok<#,ram> is the forth interpreter reporting it has

successfully processed the proceeding word(s), including comments pulse,

high and low are output from the logicprobe, all other words are defined

in the source text and the end of the notes

E FlashForth 5 ATmega2560 13.06.2022

initialize the logic probe