Lucas and Luna explore the race to put high-speed optical modems directly on silicon chips, moving data with light instead of electricity. They examine the bottleneck at the chip's edge, where electrical I/O can't keep up with internal compute speeds. The conversation focuses on a specific breakthrough: Intel's integrated hybrid silicon laser, announced in 2024, which combines an indium phosphide laser with a silicon photonics waveguide on the same die. They discuss how this shrinks transceiver costs from thousands of dollars to chip-scale, and why it matters for AI clusters, hyperscale data centers, and the future of bandwidth. Key numbers: current electrical SerDes at 112 Gbps per lane, optical links approaching 200 Gbps per lane, and the power savings of 3-5 pJ/bit for photonics versus 10-15 pJ/bit for electrical. The hosts also touch on the challenges of thermal stability and manufacturing yield.

#SiliconPhotonics #OpticalInterconnects #HybridSiliconLaser #ChipDesign #DataCenter #AIClusters #BandwidthBottleneck #Intel #IndiumPhosphide #IntegratedPhotonics #OpticalModem #SerDes #ElectronicsEngineering #Technology #FexingoBusiness #BusinessPodcast #HardwarePodcast #Chips

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On this episode of The Hardware Podcast, Lucas and Luna explore the quiet but crucial shift toward dedicated analog front-end (AFE) chips in modern electronics. With wireless sensor nodes expected to reach 75 billion by 2030, designers are separating analog conditioning from digital processing to cut noise and save power. Lucas breaks down how ADI's AD5941 bio-impedance AFE is being used in wearable health patches, and why the move from integrated ADC to standalone AFEs echoes the earlier transition from general-purpose MCUs to dedicated sensor hubs. The hosts also discuss the challenge of designing AFEs for edge AI—where precision analog must coexist with neural network inference—and why companies like STMicroelectronics and Texas Instruments are investing heavily in configurable AFE architectures. Whether you're an embedded engineer or just curious about how your smartwatch measures stress, this episode explains the chip inside the sensor.

#AnalogFrontEnd #ChipDesign #Semiconductors #WearableTech #EdgeComputing #SensorTechnology #ADI #STMicroelectronics #TexasInstruments #BioImpedance #SignalConditioning #MixedSignal #LowPowerDesign #HealthTech #IoT #HardwareEngineering #FexingoBusiness #BusinessPodcast

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Episode 67 of The Hardware Podcast explores why chip designers are turning to embedded optical interconnects to solve data movement bottlenecks. Lucas and Luna unpack the physics limits of copper wiring, the 'optical transceiver in package' approach pioneered by companies like Ayar Labs and Intel, and what it means for performance and power. They discuss the recent prototype from a major foundry showing a 10x bandwidth density improvement over electrical interconnects, and the manufacturing challenges of integrating photonics into standard CMOS processes. Tune in for a concrete look at the technology that could reshape chip-to-chip communication in AI and HPC clusters.

#EmbeddedOpticalInterconnects #SiliconPhotonics #AyarLabs #Intel #ChipDesign #DataMovement #BandwidthDensity #CMOSIntegration #AIHardware #HPC #OpticalTransceiver #CopperInterconnects #Semiconductors #Technology #FexingoBusiness #BusinessPodcast #TheHardwarePodcast #Fexingo

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Episode 66 of The Hardware Podcast. Lucas and Luna explore glass substrates for chip packaging — a material shift that could reshape how processors handle bandwidth, heat, and interconnect density. They discuss why Intel and Samsung are investing in glass core substrates, the manufacturing challenges at scale, and how this technology could enable faster AI accelerators and data-center chips. Specific numbers: glass substrates can reduce signal loss by 30% compared to organic materials and support 50% finer line widths. The hosts explain why glass is suddenly viable after decades of being dismissed as too brittle, and what it means for the next generation of heterogeneous integration. No hype — just the engineering reality.

#GlassSubstrates #ChipPackaging #Semiconductor #Intel #Samsung #AdvancedPackaging #HeterogeneousIntegration #AIAccelerators #DataCenter #MaterialScience #Corning #Technology #HardwarePodcast #FexingoBusiness #BusinessPodcast #ElectronicsEngineering #ChipDesign #Manufacturing

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In this episode of The Hardware Podcast, Lucas and Luna explore how advanced chip designers are tackling electromigration — the slow migration of metal atoms that can cause chip failure — at the three-nanometer node. They dive into the physics behind copper interconnects, why cobalt and ruthenium are replacing copper in critical layers, and how TSMC and Intel are using barrier engineering and novel liner materials to extend chip lifespan. Specific data includes the 10x improvement in electromigration resistance achieved with cobalt liners at 2nm dimensions. The discussion also touches on the hidden role of grain boundaries and the trade-off between performance and reliability. A must-listen for anyone curious about the unsung materials science behind modern processors.

#Electromigration #Semiconductors #ChipDesign #3Nanometer #TSMC #Intel #CopperInterconnects #Cobalt #Ruthenium #MaterialsScience #Reliability #Technology #Hardware #Engineering #FexingoBusiness #BusinessPodcast #TheHardwarePodcast #Podcast

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Episode 64 of The Hardware Podcast explores how chip designers are embedding dedicated hardware firewalls directly into networking silicon to protect data in motion. Lucas and Luna break down the architecture behind in-line security engines that inspect packets at line rate without sacrificing throughput. They discuss a real deployment at a major cloud provider that cut latency by 40 percent compared to software-based filtering, and walk through the trade-offs of putting firewall logic on the data plane versus the control plane. The conversation also touches on the rise of programmable match-action pipelines and why hyperscalers are pushing for open-source P4-based designs. If you design network chips or care about how your cloud traffic stays safe, this episode gives you the technical details that matter.

#HardwareFirewall #DataPlaneSecurity #NetworkChips #P4Programming #InLineEncryption #CloudSecurity #MatchActionPipeline #LineRateInspection #LatencyReduction #HyperscalerNetworking #ChipDesign #HardwareSecurity #Technology #HardwareEngineering #FexingoBusiness #BusinessPodcast #SiliconInnovation #NetworkProcessor

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By 2026, the amount of data generated at the edge is overwhelming memory bandwidth and power budgets. Lucas explains how a technique called near-sensor compression is moving data reduction from the CPU to the sensor itself. He walks through a concrete example: a 4K image sensor that outputs 400 megabytes per second, and how a dedicated compression engine can shrink that by 60 percent with no visible quality loss. Luna asks about the trade-offs in latency and energy, and Lucas points to a 2025 paper from Samsung showing a 45 percent power reduction in an always-on camera pipeline. They also discuss how this approach is spreading to lidar, microphones, and even IoT temperature sensors. The episode closes with the question of whether near-sensor compression could become a standard IP block in every system-on-chip.

#NearSensorCompression #EdgeAI #ChipDesign #Samsung #ImageSensor #DataCompression #LowPower #Hardware #Technology #Business #Semiconductors #SensorFusion #AlwaysOn #Lidar #IoT #SystemOnChip #FexingoBusiness #BusinessPodcast

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When chip features shrink to a few nanometers, the alignment between layers becomes one of the hardest problems in manufacturing. In this episode, Lucas and Luna explore the quiet crisis of overlay error — how tiny shifts in lithography masks can destroy entire wafers, and how the industry is solving it with new metrology techniques and machine learning. Featuring the specific example of ASML's latest high-NA EUV tool and why its alignment accuracy is measured in picometers. A look at the unglamorous but critical physics behind every modern processor.

#ChipManufacturing #Semiconductors #Lithography #OverlayError #ASML #EUV #Metrology #NanometerScale #MachineLearning #ChipAlignment #HighNAEUV #Picometer #Technology #HardwareEngineering #FexingoBusiness #BusinessPodcast #ChipsAndDevices #TheHardwarePodcast

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Episode 61 of The Hardware Podcast with Fexingo dives into in-memory computing, a paradigm shift that runs computations directly inside memory cells to break the von Neumann bottleneck. Lucas and Luna explore the physics behind analog compute-in-memory using resistive RAM (RRAM) crossbar arrays, and contrast it with digital near-memory processing. They discuss why this matters for AI inference on edge devices, citing a concrete example: a startup called Mythic that shipped analog compute-in-memory chips in 2022, achieving 10x energy efficiency over traditional digital accelerators. The hosts also touch on Samsung's 2021 paper demonstrating in-memory computing on an MRAM bank, and the current challenges around precision and noise. No prior chip design knowledge required.

#InMemoryComputing #ComputeInMemory #AnalogComputing #RRAM #MRAM #Mythic #Samsung #VonNeumannBottleneck #AIInference #EdgeAI #ChipDesign #Hardware #Semiconductors #Technology #FexingoBusiness #BusinessPodcast #TheHardwarePodcast #ChipRevolution

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Episode 60 of The Hardware Podcast explores ferroelectric RAM (FeRAM) and hafnium oxide-based ferroelectric FETs as a potential replacement for embedded flash and DRAM in advanced nodes. Lucas explains how ferroelectric materials switch polarization to store data without constant power, and why SkyWater Technology recently licensed a thin-film FeFET process from Ferroelectric Memory Co. for 130nm and 90nm nodes. Luna asks about endurance, write speed, and integration challenges with CMOS. The hosts discuss applications in IoT, automotive, and edge AI where low power and non-volatility matter more than raw density. A comparison to MRAM and phase-change memory clarifies FeRAM's niche. The conversation ends with the ad-free support message: listeners can support the show at buy me a coffee dot com slash fexingo.

#FeRAM #FerroelectricMemory #HafniumOxide #FeFET #SkyWaterTechnology #FerroelectricMemoryCo #EmbeddedMemory #NonVolatileMemory #CMOSIntegration #IoT #AutomotiveSemiconductors #EdgeAI #MRAM #PhaseChangeMemory #Technology #HardwarePodcast #FexingoBusiness #BusinessPodcast

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