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In Episode 3 of The Hardware Podcast, Lucas and Luna dive into the unsung hero of chipmaking: the photomask. While headlines obsess over EUV lithography machines, the photomask—the master template that patterns every transistor—is quietly becoming a bottleneck as chip designs grow more complex. Lucas explains how masks are made using electron-beam lithography, why defects are catastrophic, and the growing challenge of mask write times for extreme ultraviolet (EUV) layers. Luna questions whether mask costs are inflating chip prices and whether alternative approaches like direct-write lithography or maskless patterning could disrupt the status quo. The conversation touches on key players like ASML, Toppan, Photronics, and the mask shops inside Intel and TSMC. By the end, listeners understand why the photomask—not just the wafer fab—deserves attention as semiconductor scaling gets harder.
#Photomask #SemiconductorManufacturing #EUVLithography #ASML #Intel #TSMC #ElectronBeamLithography #ChipDesign #HardwareEngineering #TechBottleneck #MaskShop #Toppan #Photronics #AdvancedLithography #Yield #Technology #FexingoBusiness #BusinessPodcast
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In this episode of The Hardware Podcast, Lucas and Luna tackle the semiconductor industry's most pressing challenge: the end of Moore's Law. They explore why transistor scaling has hit a physics wall at the 3-nanometer node, how TSMC and Intel are navigating this transition, and what comes next—from advanced packaging to new materials like graphene and silicon photonics. Lucas explains the concept of Dennard scaling and why power density stopped dropping years ago, while Luna questions whether the industry's obsession with nanometer labels has become marketing theater. They discuss real numbers: the 2.5x increase in design costs per node, the 23,000 watts per square centimeter problem in hot spots, and the role of chiplets and 3D stacking in keeping progress alive. The episode avoids hype, focusing on the genuine engineering trade-offs and the future of specialized hardware for AI and data centers. A grounded look at where silicon goes from here.
#MooreLaw #Semiconductors #TSMC #Intel #ChipDesign #Transistor #Nanometer #PhysicsWall #DennardScaling #AdvancedPackaging #Chiplets #SiliconPhotonics #Graphene #AIHardware #Technology #HardwarePodcast #FexingoBusiness #BusinessPodcast
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In the premiere episode of The Hardware Podcast, Lucas and Luna dissect Intel's troubled 10-nanometer journey—a process node that arrived three years late and cost the company an estimated $40 billion in market value and lost business. They trace how a single architectural decision (cobalt interconnects) cascaded into years of delays, handed AMD its biggest opening since 2006, and forced Intel to abandon its famous 'tick-tock' cadence. Along the way, they unpack what 'nanometer' actually means in 2026, why the chip industry's transition from planar to FinFET transistors was so brutal, and how Intel's foundry pivot under Pat Gelsinger is both a mea culpa and a high-stakes gamble. This is a conversation about the physics of transistors, the economics of fabrication plants, and the human cost of engineering hubris—told through one of the most expensive mistakes in industrial history.
#Intel #10Nanometer #CannonLake #ProcessNode #ChipManufacturing #FinFET #Semiconductors #Technology #Hardware #EngineeringFailure #TockTick #PatGelsinger #Foundry #AMD #Transistors #CobaltInterconnects #FexingoBusiness #BusinessPodcast
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