Condor Currents

By Condor Computing

Condor Currents delivers concise breakdowns of the latest computer architecture research and RISC-V developments. Each episode covers recent arXiv papers on data prefetching, branch prediction, and mi... more

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FAQs about Condor Currents:

How many episodes does Condor Currents have?

The podcast currently has 94 episodes available.

Condor Currents episodes:

June 10, 2026 Toward Intelligent Prefetching: A Survey on Complex Memory Access Prediction Techniques
## Episode Summary
In this episode, we cover:
- **Toward Intelligent Prefetching: A Survey on Complex Memory Access Prediction Techniques** (arXiv)
- **SPARX: Secure and Privacy-Aware Approximate CNN Acceleration with Edge RISC-V SoC** (arXiv)
- **The RISC-V Vector Extensions for AI - Jon Peddie Research** (google_riscv)
- **NextSilicon to Productize Arbel RISC-V Core Into 64-Core Enterprise Processor for AI and HPC - The National Law Review** (google_riscv)
- **NextSilicon to Productize Arbel RISC-V Core Into 64-Core Enterprise Processor for AI and HPC - Eagle-Tribune** (google_riscv)
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*Sponsored by LimitLess AI*
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13min
June 09, 2026 MOSAIC: A Workload-Driven Simulation and Design-Space Exploration Framework for Heterogeneous NPUs
## Episode Summary
In this episode, we cover:
- **MOSAIC: A Workload-Driven Simulation and Design-Space Exploration Framework for Heterogeneous NPUs** (arXiv)
- **NetKV: Network-Aware Decode Instance Selection for Disaggregated LLM Inference** (arXiv)
- **RISC-V: The Open-Source Revolution in CPU Architecture - Design And Reuse** (google_arch)
- **As Alibaba launches server-grade RISC-V CPU, Beijing throws its weight behind ISA - The Register** (google_riscv)
- **Vortex 3.0 Released As Full-Stack, Open-Source RISC-V GPU Now With 3D Pipeline - Phoronix** (google_riscv)
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*Sponsored by LimitLess AI*
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10min
June 08, 2026 ANNS-AMP: Accelerating Approximate Nearest Neighbor Search via Adaptive Mixed-Precision Computing
## Episode Summary
In this episode, we cover:
- **ANNS-AMP: Accelerating Approximate Nearest Neighbor Search via Adaptive Mixed-Precision Computing** (arXiv)
- **MOSAIC: A Workload-Driven Simulation and Design-Space Exploration Framework for Heterogeneous NPUs** (arXiv)
- **Evaluating and Calibrating Performance On RISC-V Vector Processors (KTH, LLNL, BSC) - Semiconductor Engineering** (google_riscv)
- **Breker Verification Systems and Frontgrade Gaisler Collaborate on High-Reliability RISC-V Fault Tolerant Processor Core - Business Wire** (google_riscv)
- **Prompt to tape out: Autonomous AI agent builds 1.5 GHz RISC-V CPU - Adafruit** (google_riscv)
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*Sponsored by LimitLess AI*
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12min
June 07, 2026 BIDENT: Heterogeneous Operator-level Mapping for Efficient Edge Inference
## Episode Summary
In this episode, we cover:
- **BIDENT: Heterogeneous Operator-level Mapping for Efficient Edge Inference** (arXiv)
- **Multi-Segment Attention: Enabling Efficient KV-Cache Management for Faster Large Language Model Serving** (arXiv)
- **Initial Benchmarks Of The SpacemiT K3 RVA23 RISC-V CPU With The K3 Pico-ITX - Phoronix** (google_riscv)
- **A Deep Dive Into CPU Architecture - i-programmer.info** (google_arch)
- **India Launches DHRUV64, Its First 1 GHz, 64-bit Dual-Core RISC-V CPU - TechPowerUp** (google_riscv)
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*Sponsored by LimitLess AI*
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10min
June 06, 2026 AheadComputing Introduces Breakthrough CPU Architecture for General-Purpose Computing, With Jim Keller on Board - TechPowerUp
## Episode Summary
In this episode, we cover:
- **AheadComputing Introduces Breakthrough CPU Architecture for General-Purpose Computing, With Jim Keller on Board - TechPowerUp** (google_arch)
- **Deja Vu: A Brief History of Every Mac CPU Architecture - How-To Geek** (google_arch)
- **How RISC-V CPUs and GPUs Are Reshaping High-Performance SoCs in 2026 - News and Statistics - IndexBox** (google_riscv)
- **How Did An AI Agent Build a RISC V CPU Core In Just 12 Hours - IEEE Spectrum** (google_riscv)
- **India unveils a homegrown dual-core 1GHz RISC-V processor, the DHRUV64 - The Register** (google_riscv)
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*Sponsored by LimitLess AI*
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9min
June 05, 2026 Migration Using Context Cache for Multicore RISC‐V Processor - Wiley Online Library
## Episode Summary
In this episode, we cover:
- **Migration Using Context Cache for Multicore RISC‐V Processor - Wiley Online Library** (google_riscv)
- **The Evolution of CPU Architectures – From Intel 4004 To Modern SoCs - Wccftech** (google_arch)
- **Performance aware shared memory hierarchy model for multicore processors - Nature** (google_arch)
- **RISC-V vs ARM: Which Instruction Set Architecture Will Dominate the Future? - Electropages** (google_arch)
- **Bit-Brick K1: Raspberry Pi 5 alternative with different CPU architecture, M.2 and PCIe support launches - Notebookcheck** (google_arch)
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*Sponsored by LimitLess AI*
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12min
June 04, 2026 Dead on Arrival: Characterizing and Protecting Against Dead-Entry TLB Misses in GPU Microarchitectures
## Episode Summary
In this episode, we cover:
- **Dead on Arrival: Characterizing and Protecting Against Dead-Entry TLB Misses in GPU Microarchitectures** (arXiv)
- **CHIMERA: A Flexible and Scalable 3.1 TOPS/W AI-MCU with Transformer Accelerator and 563 Gb/s Shared-L2 Memory Subsystem with QoS Guarantees** (arXiv)
- **The key CPU architecture you've never heard of: RISC-V - Red Shark News** (google_arch)
- **RISC-V Vector Extension: Between standardization and tailor-made accelerators - eeNews Europe** (google_riscv)
- **A RISC-V vector extension primer - Adafruit** (google_riscv)
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*Sponsored by LimitLess AI*
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6min
June 03, 2026 RISC-V set to announce 25% market penetration — open-standard ISA is ahead of schedule, securing fast-growing silicon footprint - Tom's Hardware
## Episode Summary
In this episode, we cover:
- **RISC-V set to announce 25% market penetration — open-standard ISA is ahead of schedule, securing fast-growing silicon footprint - Tom's Hardware** (google_riscv)
- **Nvidia's CUDA platform now supports RISC-V — support brings open source instruction set to AI platforms, joining x86 and Arm - Tom's Hardware** (google_riscv)
- **White paper: The All-Big-Core CPU Architecture of MediaTek Dimensity 9300 - MediaTek** (google_arch)
- **QuMA: Researchers Develop Quantum Microarchitecture that "Bridges the Gap" in Processor System Stacks - IEEE Computer Society** (google_arch)
- **China claims to have developed the world's first AI-designed processor — LLM turned performance requests into CPU architecture - Tom's Hardware** (google_arch)
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*Sponsored by LimitLess AI*
...more
6min
June 02, 2026 Regular-Dead on Arrival: Characterizing and Protecting Against Dead-Entry TLB Misses in GPU Microarchitectures
## Episode Summary
In this episode, we cover:
- **Regular-Dead on Arrival: Characterizing and Protecting Against Dead-Entry TLB Misses in GPU Microarchitectures** (arXiv)
- **Observation, Not Prediction: Conversation-Level Disaggregated Scheduling for Agentic Serving** (arXiv)
- **SpacemiT K3 “16-core” RISC-V SoC system information and (early) benchmarks - CNX Software** (google_riscv)
- **RISC-V Mentorship Taught Me the RISC-V ISA Is Far More Than a Reference Manual** (riscv_news)
- **One ISA, Infinite Use Cases: RISC-V and the Road to Workload-Specific Silicon** (riscv_news)
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*Sponsored by LimitLess AI*
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6min
June 01, 2026 FREESS: A Web-Based Educational Simulator for a RISC-V-Inspired Superscalar Processor with Tomasulo-Style Dynamic Scheduling
## Episode Summary
In this episode, we cover:
- **FREESS: A Web-Based Educational Simulator for a RISC-V-Inspired Superscalar Processor with Tomasulo-Style Dynamic Scheduling** (arXiv)
- **Code size reduction by advanced near addressing modes** (arXiv)
- **Evaluating RISC-V Vector Processors: GCC vs. LLVM Autovectorization Benchmarks (May 2026) - News and Statistics - IndexBox** (google_riscv)
- **Checking In On The ISA Wars And Its Impact On CPU Architectures - Hackaday** (google_arch)
- **Support RAJA and Scientific Applications on RVV Architectures** (riscv_news)
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*Sponsored by LimitLess AI*
...more
6min

FAQs about Condor Currents:

How many episodes does Condor Currents have?

The podcast currently has 94 episodes available.