Embedded Edge

In this episode, we talk about formal verification (FV) with Dr Ashish Darbari, founder, and CEO of Axiomise. We talk about the role of FV in enabling designs to be shipped bug-free, how FV helps developers and where it fits in the design flow, whether it’s in embedded AI, IoT or high-performance computing (HPC). We also learn about Axiomise – from the company’s founding in 2017 to its impact in today’s embedded world.

In this podcast, we chat with ProvenRun and Crypto Quantique about secure operating systems and hardware IP for the IoT, and with Cascoda on the success of KNX in smart buildings.

In this podcast, we discuss the NFC technology roadmap to 2028, why open, ambient IoT is key to the proliferation of connected devices, and an open silicon photonics platform to address HPC/AI needs.

In this podcast we chat with Alessandro Ranellucci of Arduino to hear about the company’s new UNO R4 32-bit development offering Wi-Fi connectivity and one-click cloud connectivity for IoT.

Nitin Dahad, editor in chief of Embedded.com, shares an interview from the Future of the Car 2023 conference.

In this podcast, we talk to SemiDynamics about its fully configurable 64-bit RISC-V core, VyperCore talks about memory allocation management to enable 10x compute performance improvement, and Agile Analog speaks on new digitally wrapped analog IP subsystems.

In this episode of Embedded Edge with Nitin, Sailesh Chittipeddi from Renesas Electronics discusses the Panthronics acquisition and its relevance to the company's connectivity strategy, as well as insights from Synopsys executives at the SNUG 2023 event on cloud EDA, silicon lifecycle management, multi-die, and AI-driven EDA.

In this special edition podcast from embedded world 2023 in Nuremberg, Germany, we look at the latest in edge AI, IoT, and machine vision to serve the smart connected edge.

In this podcast: a look at what’s happening in software-defined vehicles from the e/e architecture perspective, intelligent edge trends and FPGAs, plus edge connectivity, especially for asset tracking where multiple protocols need to be managed.

In this episode, we talk about chiplets, 3D stacking, heterogenous integration, and multi-die systems design. Stanford University’s Subhasish Mitra talks about his keynote at the HiPEAC conference, where he talked about using computation immersed in memory to break down the memory wall and the scaling wall and build a dream chip delivering 1000x energy efficiency. And then, we talk to Cadence, Synopsys, and Eliyan about some of the opportunities and challenges for chiplet design.