Five Minute VHDL Podcast

Five Minute VHDL Podcast

By Francesco RichichiTechnologyEducation
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Five Minute VHDL Podcast episodes

  • Q&A#10 RAM Parallelism
    How I can parallelize a RAM in FPGA

    https://surf-vhdl.com/how-to-implement-a-multi-port-memory-on-fpga/


    Website
    https://surf-vhdl.com

    Telegram channel
    https://t.me/SurfVhdl

    You can contact me
    mail: [email protected]

    Telegram:
    https://t.me/francesco_surfvhdl

    Teachable courses
    https://surf-vhdl.link/courses
    4 min
  • ep#22-Multiplier optimization
    Learn how to optimize a multiplier in particular cases:

    For a technical analysis go to the post:

    https://surf-vhdl.link/OptimizationVhdl12b25


    Website
    https://surf-vhdl.com

    Telegram channel
    https://t.me/SurfVhdl

    You can contact me
    mail: [email protected]

    Telegram:
    https://t.me/francesco_surfvhdl

    Teachable courses
    https://surf-vhdl.link/courses
    6 min
  • Q&A#09-I need a clock!
    In this podcast we will understand how to connect a clock signal to our FPGA


    Website
    https://surf-vhdl.com

    Telegram channel
    https://t.me/SurfVhdl

    You can contact me
    mail: [email protected]

    Telegram:
    https://t.me/francesco_surfvhdl

    Teachable courses
    https://surf-vhdl.link/courses
    9 min
  • Q&A#08- What is the dithering
    What is dithering?
    Where we can use this technique?

    Website
    https://surf-vhdl.com

    Telegram channel
    https://t.me/SurfVhdl

    You can contact me
    mail: [email protected]

    Telegram:
    https://t.me/francesco_surfvhdl

    Teachable courses
    https://surf-vhdl.link/courses

    Music by Francis Preve - https://www.francispreve.com
    5 min
  • ep#20-VHDL Generic
    VHDL Generic


    Website
    https://surf-vhdl.com

    Telegram channel
    https://t.me/SurfVhdl

    You can contact me
    mail: [email protected]

    Telegram:
    https://t.me/francesco_surfvhdl

    Teachable courses
    https://surf-vhdl.link/courses

    Music by Francis Preve - https://www.francispreve.com
    6 min
  • Ep#19-Iterative statement
    Even if the VHDL is not a software language, we can find a tyoica SW statement, the iterative statement. Let’s see how to use this

    https://t.me/SurfVhdl/92

    Website
    https://surf-vhdl.com

    Telegram channel
    https://t.me/SurfVhdl

    You can contact me
    mail: [email protected]

    Telegram:
    https://t.me/francesco_surfvhdl

    Teachable courses
    https://surf-vhdl.link/courses

    Music by Francis Preve - https://www.francispreve.com
    5 min
  • Ep#18-the conditional assignment in VHDL
    Let’s understand how to implement a conditional statement in VHDL
    image for the episode

    http://t.me/SurfVhdl/86


    Website
    https://surf-vhdl.com

    Telegram channel
    https://t.me/SurfVhdl

    You can contact me
    mail: [email protected]

    Telegram:
    https://t.me/francesco_surfvhdl

    Teachable courses
    https://surf-vhdl.link/courses

    Music by Francis Preve - https://www.francispreve.com
    8 min
  • ep#17-wait
    Wait Statements in VHDL
    Reference to pictures:

    https://t.me/SurfVhdl/82


    Website
    https://surf-vhdl.com

    Telegram channel
    https://t.me/SurfVhdl

    You can contact me
    mail: [email protected]

    Telegram:
    https://t.me/francesco_surfvhdl

    Teachable courses
    https://surf-vhdl.link/courses

    Music by Francis Preve - https://www.francispreve.com
    6 min
  • Q&A#07- What is the first thing that a recruiter does?
    Q&A#07- What is the first thing that a recruiter does?
    When a recruiter needs to hire you as VHDL expert, what do you think he or she will do to understand if you are good for him or her?
    What can you do in order to result a VHDL user?
    Let’s see in this podcast.

    Here you can find the feedback of my VHDL student

    https://surf-vhdl.link/vhdl-student

    Telegram channel
    https://t.me/SurfVhdl

    You can contact me
    mail: [email protected]

    Telegram:
    https://t.me/francesco_surfvhdl

    Teachable courses
    https://surf-vhdl.link/courses
    5 min

About Five Minute VHDL Podcast

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Let's talk about hardware design using VHDL