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In 1997, American chip consortium SEMATECH sounded an alarm to the industry about the chip design productivity gap. They observed that integrated chip manufacturing capabilities were expanding at about 40% a year. At the time.
Yet IC design capabilities were only growing at about half of that rate. Thus, a potential crisis was brewing where design capabilities lag far behind manufacturing.
This crisis never took place for reasons we will discuss later. In turn, however, a new challenge for the industry has emerged: Verification.
Here, we are going to look at why this previously unheralded step has become a rather big deal in today's competitive chip design world.
 By Jon Y
By Jon Y5
2424 ratings
In 1997, American chip consortium SEMATECH sounded an alarm to the industry about the chip design productivity gap. They observed that integrated chip manufacturing capabilities were expanding at about 40% a year. At the time.
Yet IC design capabilities were only growing at about half of that rate. Thus, a potential crisis was brewing where design capabilities lag far behind manufacturing.
This crisis never took place for reasons we will discuss later. In turn, however, a new challenge for the industry has emerged: Verification.
Here, we are going to look at why this previously unheralded step has become a rather big deal in today's competitive chip design world.

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