The Hardware Podcast with Fexingo: Chips, Devices, and Electronics Engineering Conversations

By 2026, the amount of data generated at the edge is overwhelming memory bandwidth and power budgets. Lucas explains how a technique called near-sensor compression is moving data reduction from the CPU to the sensor itself. He walks through a concrete example: a 4K image sensor that outputs 400 megabytes per second, and how a dedicated compression engine can shrink that by 60 percent with no visible quality loss. Luna asks about the trade-offs in latency and energy, and Lucas points to a 2025 paper from Samsung showing a 45 percent power reduction in an always-on camera pipeline. They also discuss how this approach is spreading to lidar, microphones, and even IoT temperature sensors. The episode closes with the question of whether near-sensor compression could become a standard IP block in every system-on-chip.

#NearSensorCompression #EdgeAI #ChipDesign #Samsung #ImageSensor #DataCompression #LowPower #Hardware #Technology #Business #Semiconductors #SensorFusion #AlwaysOn #Lidar #IoT #SystemOnChip #FexingoBusiness #BusinessPodcast

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When chip features shrink to a few nanometers, the alignment between layers becomes one of the hardest problems in manufacturing. In this episode, Lucas and Luna explore the quiet crisis of overlay error — how tiny shifts in lithography masks can destroy entire wafers, and how the industry is solving it with new metrology techniques and machine learning. Featuring the specific example of ASML's latest high-NA EUV tool and why its alignment accuracy is measured in picometers. A look at the unglamorous but critical physics behind every modern processor.

#ChipManufacturing #Semiconductors #Lithography #OverlayError #ASML #EUV #Metrology #NanometerScale #MachineLearning #ChipAlignment #HighNAEUV #Picometer #Technology #HardwareEngineering #FexingoBusiness #BusinessPodcast #ChipsAndDevices #TheHardwarePodcast

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Episode 61 of The Hardware Podcast with Fexingo dives into in-memory computing, a paradigm shift that runs computations directly inside memory cells to break the von Neumann bottleneck. Lucas and Luna explore the physics behind analog compute-in-memory using resistive RAM (RRAM) crossbar arrays, and contrast it with digital near-memory processing. They discuss why this matters for AI inference on edge devices, citing a concrete example: a startup called Mythic that shipped analog compute-in-memory chips in 2022, achieving 10x energy efficiency over traditional digital accelerators. The hosts also touch on Samsung's 2021 paper demonstrating in-memory computing on an MRAM bank, and the current challenges around precision and noise. No prior chip design knowledge required.

#InMemoryComputing #ComputeInMemory #AnalogComputing #RRAM #MRAM #Mythic #Samsung #VonNeumannBottleneck #AIInference #EdgeAI #ChipDesign #Hardware #Semiconductors #Technology #FexingoBusiness #BusinessPodcast #TheHardwarePodcast #ChipRevolution

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Episode 60 of The Hardware Podcast explores ferroelectric RAM (FeRAM) and hafnium oxide-based ferroelectric FETs as a potential replacement for embedded flash and DRAM in advanced nodes. Lucas explains how ferroelectric materials switch polarization to store data without constant power, and why SkyWater Technology recently licensed a thin-film FeFET process from Ferroelectric Memory Co. for 130nm and 90nm nodes. Luna asks about endurance, write speed, and integration challenges with CMOS. The hosts discuss applications in IoT, automotive, and edge AI where low power and non-volatility matter more than raw density. A comparison to MRAM and phase-change memory clarifies FeRAM's niche. The conversation ends with the ad-free support message: listeners can support the show at buy me a coffee dot com slash fexingo.

#FeRAM #FerroelectricMemory #HafniumOxide #FeFET #SkyWaterTechnology #FerroelectricMemoryCo #EmbeddedMemory #NonVolatileMemory #CMOSIntegration #IoT #AutomotiveSemiconductors #EdgeAI #MRAM #PhaseChangeMemory #Technology #HardwarePodcast #FexingoBusiness #BusinessPodcast

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Lucas and Luna dive into the unsung science of thermal management in modern chips. From the IBM z16 mainframe's liquid-cooled design to Apple's M-series unified thermal spreaders, they explore how heat dissipation is becoming the bottleneck in performance scaling. The episode features a detailed breakdown of heat sink design principles, the shift from thermal paste to liquid metal TIMs, and why data centers are now prioritizing power density over clock speed. A must-listen for hardware engineers and tech enthusiasts curious about the physics behind every degree of chip temperature.

#ThermalManagement #ChipCooling #HeatSink #IBMz16 #AppleMSeries #LiquidCooling #ThermalInterfaceMaterial #PowerDensity #DataCenterCooling #ChipDesign #Semiconductor #Engineering #Technology #FexingoBusiness #BusinessPodcast #HardwarePodcast #ElectronicsEngineering #TechTrends

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Chiplets are everywhere now — Apple, AMD, Intel all mix and match dies in a single package. But the glue that holds them together is a mess of proprietary protocols, each with its own licensing and overhead. Lucas and Luna drill into one specific effort to fix that: the Universal Chiplet Interconnect Express, or UCIe, standard. They trace its origins back to 2022, when a handful of companies — Intel, AMD, Arm, and others — agreed to build an open spec. Three years later, adoption is picking up but the challenges remain: physical-layer compatibility, testing, and the basic question of whether the industry can actually agree on one way to talk between chiplets. This episode uses real numbers — like the 25 gigabit-per-second per lane bandwidth target and the 30-plus companies now in the consortium — to show why UCIe matters and where it still falls short. No hype, just the engineering reality behind the promise of mix-and-match chiplets.

#UCIe #UniversalChipletInterconnect #Chiplets #HeterogeneousIntegration #Semiconductor #Intel #AMD #Arm #ChipDesign #InterconnectStandard #DieToDie #AdvancedPackaging #Technology #SemiconductorIndustry #ChipletEcosystem #FexingoBusiness #BusinessPodcast #HardwarePodcast

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Lucas and Luna explore why chip designers are turning back to analog computing for AI inference, with a focus on Mythic's analog in-memory compute chip that achieves 10 TOPS per watt. They explain how analog compute works by representing data as voltage levels instead of digital bits, avoiding the Von Neumann bottleneck. The episode covers the key tradeoffs: lower precision (8-bit equivalent) but dramatically better energy efficiency for edge AI tasks like keyword spotting and sensor fusion. Lucas cites Mythic's MP10308 chip delivering 35 trillion operations per second at 3.5 watts—roughly 10x the efficiency of a digital GPU. Luna questions precision limits, and Lucas explains how self-calibrating circuits and error correction make analog viable. They conclude by discussing where analog compute fits: always-on sensors, industrial IoT, and smart home devices that need AI without cloud latency.

#AnalogCompute #AIHardware #InMemoryCompute #Mythic #ChipDesign #EdgeAI #EnergyEfficiency #Semiconductors #Technology #HardwareEngineering #AIInference #ComputeArchitecture #FexingoBusiness #BusinessPodcast #LowPower #NeuralNetworks #MixedSignal #Chiplets

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In this episode of The Hardware Podcast, Lucas and Luna explore the emerging trend of backside power delivery networks—a radical redesign of how chips get their electricity. They break down why traditional frontside power delivery is hitting a wall as transistors shrink below 3 nanometers, and how moving power wires to the back of the silicon frees up space for signal routing and reduces voltage drop. The discussion centers on Intel's PowerVia technology, expected in their 20A node, and TSMC's competing approach. Lucas explains the manufacturing challenges—like wafer thinning and through-silicon vias—and why this shift could extend Moore's Law for another node or two. Luna brings up the cost implications and asks whether backside power is a one-time fix or a lasting solution. The episode closes with a reflection on how fundamental changes to chip architecture, rather than just shrinking transistors, are keeping the industry on track.

#BacksidePowerDelivery #PowerVia #Intel20A #TSMC #ChipDesign #Semiconductor #Moore'sLaw #TransistorScaling #Manufacturing #Technology #Hardware #Chips #ElectronicsEngineering #FexingoBusiness #BusinessPodcast #LucasAndLuna #WaferThinning #ThroughSiliconVias

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Episode 55 of The Hardware Podcast explores the shift toward embedding dedicated AI accelerator cores into mainstream chips, not just high-end server processors. Lucas and Luna examine Apple's Neural Engine as a case study, tracing its evolution from the A11 Bionic in 2017 to the current M4 architecture, which dedicates 16 cores to on-device machine learning. They discuss why general-purpose CPU and GPU cores are inefficient for inference workloads, how the Neural Engine handles tasks like real-time language translation and photo processing without cloud latency, and the design trade-offs in area, power, and programmability. The hosts also touch on the broader industry trend, with Qualcomm's Hexagon NPU and Google's TPU influence, and consider whether dedicated AI cores will become as standard as GPU cores in future SoCs. A brief donation segment ties listener support to keeping the show ad-free.

#AppleNeuralEngine #AIAccelerator #MachineLearning #ChipDesign #HardwarePodcast #Fexingo #Technology #SoC #NeuralProcessingUnit #QualcommHexagon #GoogleTPU #EdgeAI #Inference #M4Chip #OnDeviceML #AppleSilicon #Semiconductors #BusinessPodcast

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Episode 54 of The Hardware Podcast dives into the quiet shift from fans to liquid cooling in high-performance chips. Lucas and Luna explore why a single AI accelerator now draws over 1000 watts, how direct-to-chip liquid cooling works, and what the transition means for data center design, energy costs, and future chip architectures. Using specific examples from recent hyperscaler deployments and chipmaker roadmaps, they unpack the thermal limits that are forcing the industry to rethink decades-old cooling assumptions.

#LiquidCooling #ChipCooling #DataCenter #ThermalManagement #AIAccelerators #DirectToChip #Hyperscaler #EnergyEfficiency #HeterogeneousIntegration #AdvancedPackaging #PowerDensity #CoolantDistributionUnit #SinglePhaseCooling #TwoPhaseCooling #ImmersionCooling #Technology #FexingoBusiness #BusinessPodcast

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