Disclaimer: This is highly incomplete. I am not an expert in the field. There might be some unfamiliar terms. While I will try to explain things, explaining every single term would be beyond this post. You will usually be able to get a sufficient understanding by clicking the links or googling it.

I think everyone, if they read about the chip industry long enough, has a moment where they have to put down a book or pause a podcast and simply remain stunned at the fact that it is possible to design and build something that is so incredibly impressive.

The Apple A17 chip contains 183 million transistors per square millimeter. All placed in a coherent manner and produced with extremely high reliability.

This is exactly why it is so fascinating to learn more about how it is actually done. On [...]

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Outline:

(00:25) Introduction

(01:16) Background Knowledge

(03:43) The Design Process

(03:52) Definition and Planning

(04:18) Design and Verification

(05:40) Logic Synthesis

(06:54) Physical Design

(07:57) Signoff and Tapeout

(08:28) Takeaways

(09:16) Appendix

(09:19) 1 Verilog example

(09:30) 2 Gate-Level Netlist example

The original text contained 7 footnotes which were omitted from this narration.

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Source:

Narrated by TYPE III AUDIO.